1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device having a semiconductor element.
2. Description of the Related Art
Conventionally, a so-called active matrix driving type display panel or a semiconductor integrated circuit including a semiconductor element typified by a thin film transistor (hereinafter also referred to as a “TFT”) or a MOS transistor is manufactured by patterning various thin films through a light-exposure step (hereinafter referred to as a photolithography step) using a photomask.
In a photolithography step, a resist mask is formed by applying a resist to an entire surface of a substrate, prebaking it, irradiating the resist with an ultraviolet ray or the like through a photomask, and then developing it. After that, a thin film (a thin film formed of a semiconductor material, an insulating material or a conductive material) existing except in a portion to become a semiconductor region or a wiring is removed by etching using the resist mask as a mask to form the semiconductor region or the wiring. (Reference 1: Japanese Patent Laid-Open No. 2000-188251)
However, when a semiconductor film is etched to form a semiconductor region with a desired shape by using the conventional photolithography step, a resist is applied to a surface of the semiconductor film. At this time, there is a problem in that the surface of the semiconductor film is directly exposed to the resist, and thus the semiconductor film is contaminated with impurities such as oxygen, carbon, and a heavy-metal element contained in the resist. Such an impurity element is mixed into the semiconductor film due to this contamination, so that a property of a semiconductor element is deteriorated. Particularly, as for TFTs, there is a problem in that this contamination causes variation and deterioration of a property of the transistor.
In a process of forming a wiring or a semiconductor region using the photolithography step, there is a problem in that throughput is decreased due to a large number of steps of forming the wiring or the semiconductor region as well as the most of resist materials are wasted.